Originally Posted by BFWE1ATNET
... as per the block diagram here noted from Digital Stream cecb it appears to have seperate decoder chips to downconvert the HDTV signal to 480i.
You're misreading the block diagram.
The "video dec"oder is fed a CVBS signal, which is composite video.http://en.wikipedia.org/wiki/Composite_video
The signal out of the tuner block that is of HDTV interest is the "TS" or Transport Stream. That goes into the SOC that eyager mentioned, that contains the TS demux and MPEG decoder.
I'm having difficulty understanding why a hack (modification) cannot be made from these converters as the units recieve the digital stream exactly as broadcast then somewhere in the circuitry it then downconverts to 480i.
The high def video is downscaled while it's still digital data. You're not going to find "circuitry" that performs "downconversion".
You may be underestimating the complexity of these converter boxes. That SOC in that DigitalStream diagram does not mention the microprocessor, probably because the term "SOC" implies one. The microprocessor is likely to be a 32-bit RISC chip that might use a memory management unit and virtual memory. There's probably a protected kernel and multi-threaded application firmware. If you think that reads a bit like a computer, yes, it is.
BTW the DigitalStream block diagram is _not_ for a CECB. The block diagram is for some tuner board that has DVI, a PCI card slot and a whole other bunch of non-approved interfaces.