Is the PS5 APU a chiplet design? Adored TV speculates on the Navi GPU as a chiplet design.
In support of this a paper on 7nm and smaller nodes has these points.
1) Clock speeds are not going to increase or will marginally increase with smaller nodes.
2) 7nm and smaller nodes can not support traditional IO currents at higher clocks without special treatment, GDDR6 alleviates this somewhat...HBM even more so.
3) TSMC states the 3nm node will be low power for the above reasons.
4) Since it supports 8K video and likely will need to support at least 4K @ 120FPS for VR which is 2K/eye, it has a HDMI 2.1 port which means something less or equal to 48 Gbs (6 GB/sec
5) Given the Cerny statement that the game load times are 15 times the PS4 Pro with SSD drive we have a significant increase in IO speeds. The PS4 pro with a SSD drive maxes out at 510 MB/s and 15 times that is 7.650 GB/sec
. The PS4 and Pro IO speeds are limited by the ARM southbridge. While it's likely the PS5 GDDR6 memory will have a ARM trustzone processor for trusted boot and encrypted memory (AMD Secure VM), the IO drivers for memory will not be low power ARM designs.
Speculation is the PS5 chip supports a maximum 3 Ghz CPU clock and 1.8 Ghz GPU clock, compare that to a PS4 Pro 2.13 Ghz CPU clock and 911 Ghz GPU clock. Digital foundry speculates, given various GCN CU counts, that results between 8 and 12 TF. Also in the Adored TV video above, the midrange Navi dGPUs have 8GB GDDR6. I suspect this means the PS5 will have 8GB but before you go off the deep end, Cerny showed how the SSD drive in the PS5 solves some of the small (8GB memory) issues.
it's possible it needs a separate IO chip @ 14nm.